Join the Future of Design

Build the next generation of silicon technology with a team that values technical mastery and innovation.

Engineering Without Boundaries

At Vedamsemi, we don't just solve problems; we engineer solutions that rewrite the rules of semiconductor design. Our engineers are at the forefront of advanced node development, working on technology that defines the future of AI, mobile connectivity, and autonomous systems.

We foster a culture of lifelong learning, technical curiosity, and collaborative excellence. We provide our team with access to world-class EDA tools and mentorship from industry experts.

What We Look For

  • ▹ Deep technical curiosity and analytical mindset
  • ▹ Mastery of EDA industry standards and tools
  • ▹ Collaborative spirit and strong communication
Collaborative Engineering Session

Current Openings

Physical Design Engineer

Experience: 1-8 years

Focus: RTL-to-GDSII, Timing closure, floorplanning on 7nm/5nm FinFET nodes.

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STA / Timing Specialist

Experience: 5-10 years

Focus: Sign-off timing analysis, MMMC, ECO management, and cross-talk mitigation.

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Analog Layout Engineer

Experience: 2-6 years

Focus: High-precision layout for PLL, SerDes, and power management modules.

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Physical Verification Engineer

Experience: 4-7 years

Focus: DRC/LVS closure, EMIR analysis, and reliability verification.

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Don't see a perfect fit? We're always looking for world-class talent.

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